* All Platforms

  - Issue with 8MB VRAM being less stable has been resolved, code is now
    correctly allowed in the 2-8MB area.
  
  - ARM SWP instruction correctly handles unaligned access.

  - Enhancements to TLB to correctly flush caches on more operations.

* Windows

  - The window maximise button has been disabled, as the size of the window is
    determined by the mode in RISC OS.